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IP Cores and Reference Designs

IP and reference design based on Anlogic chip series
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Translation Version Note

The available documentations here are translated from the Chinese version, in the event of any inconsistency or conflict between the Chinese verison of these documents and any translated version, the Chinese version shall control. The translated version might not demonstrate the latest Chinese version documentation, only for reference. Please refer to the latest Chinese version documentation for the latest information.

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Please login to the member first to supplement your personal information. If you need to activate permissions, please send the specific requirements and registered phone number to the following email. Customer service personnel will process it as soon as possible.We have provided TD4.6.4, TD4.6.5, and TD4.6.6 for the development of EF2EF3EG4 series chip solutions, which can be directly downloaded;

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